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AS2701A (ISA3+) AS-Interface Slave IC
Data Sheet Rev. C, October 2000
AS-Interface Slave IC AS2701A (ISA3+)
Key Features
* * * * * * * * * * Simple two-wire bus (AS-Interface line) Transmission of both power and signal on the AS-Interface line Decoupling of power and signal by the IC without additional external devices Transmitting protocol for using the IC and the AS-Interface master in the transmit/receive modes Switching of max. 31 AS-Interface slave ICs on one bus possible Power supply of peripheral devices from the AS-Interface slave IC of up to 35mA@24V Only few external devices necessary for operation (quartz, 4 capacitors, E2PROM) Storing of the configuration data and the slave address in one E2PROM Quartz oscillator for 5.333 MHz without external capacitances Standards: AS-Interface-Spec V2.0 and EN 50295
General Description
The signal transmission between the master and the slaves in the AS-Interface system is performed by a parallel two-line wire (AS-Interface line) to which the IC is connected only via a polarity protection diode and a suppressor diode. The line is powered by a direct dc voltage of up to 33.1 V, on which data pulses with signal amplitudes of (3...8) Vpp are superimposed. The IC extracts its own power and the power for peripherals from the line and detects the bus signals. The AS-Interface slave IC consists of the following blocks: * Receive Block * Transmit Block * Digital Logic Block * Emergency Control Block * Internal and External Power Supply with Signal decoupling * Oscillator * Power on Reset * High Voltage I/O
Block Diagram
TEST LTGP
switch
Transmit Block
Internal Power Supply Signal Decoupling
CDC UOUT
Ext. Power Supply
U5R Emergency and Temperature Control Block E2-Interface Receive Block
imp_pos, imp_neg
SCL SDA
D0...D3
LTGN
Power-On Reset
Oscillator
Digital Block
HVI/O
DSTBn P0...P3 PSTBn
OSC1
Rev. C, October 2000
OSC2
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AS-Interface Slave IC AS2701A (ISA3+)
Package
SOIC20
Pin Description
D3 D2 D1 D0 DSTBn U5R TEST SCL SDA LTGN
1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11
P3 P2 P1 P0 PSTBn OSC2 OSC1 UOUT CDC LTGP
Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
Name D3 D2 D1 D0 DSTBn U5R TEST SCL SDA LTGN LTGP CDC UOUT OSC1 OSC2 PSTBn P0 P1 P2 P3
Type I/O I/O I/O I/O I/O Voltage OUT IN OUT I/O SUPPLY SUPPLY Voltage OUT Voltage OUT IN OUT OUT OUT OUT OUT OUT
Description Data input/output 3, configurable Data input/output 2, configurable Data input/output 1, configurable Data input/output 0, configurable Strobe output for the data port, input for a reset signal (active low) Supply voltage of the E2PROM, Blocking capacitor CU5R Connection to the capacitor CTEST Serial two-wire bus, puls wire Serial two-wire bus, address and data wire AS-Interface wire, negative supply AS-Interface wire, positive supply Blocking capacitor CCDC Peripherals Quartz connection Quartz connection Strobe output for the parameter port, test mode (without importance for users) Parameter output 0 Parameter output 1 Parameter output 2 Parameter output 3
Rev. C, October 2000
Page 3 of 16
AS-Interface Slave IC AS2701A (ISA3+)
Functional Description
The IC identifies and decodes the supply voltage overlapping signals of the master telegram. If the slave address contained within the master telegram coincides with the stored information in the E2PROM of the slave address, the corresponding master command of the addressed AS-Interface slave IC is executed. After decoding of the master telegram the addressed AS-Interface slave IC responds with a corresponding slave answer on the AS-Interface line. The AS-Interface slave IC extracts its own supply voltage and the supply voltage for the E2PROM from the AS-Interface line. At the same time, the IC provides a direct voltage for the peripheral UOUT which results from ULTGP-UDROP for a maximum current of 35 mA. The receive block detects the signal on the AS-Interface wire LTGP. The reference voltages of the signal comparators are (52.5 5) % of the maximum signal value and are controlled by a peak value detector in the following mode: The comparator level is set to its default value by Reset or if a non-correct signal is received. If a line pause is detected, the level reset is released and the IC is able to adapt itself to different signal levels. If the IC is not synchronized yet, the level adaption is faster (smaller attack and decay time constants) as in the synchronous case. The output information of the receive blocks are the signals: "imp_pos" and "imp_neg". The transmit block drives the output level for the modulated transmit signal edges. The transmit block consists of the NMOS transistor (transmit transistor), DAC for transmit signal formation and a Jabber-Inhibit Circuitry. The DAC is addressed by the digital block. If the transmitter is active more than typ. 300s the Jabber-Inhibit circuit separates the IC from the AS-Interface line. This condition can only be left by a Power-On-Reset. In the digital block the received signal is analyzed, the transmit signal is generated and the data and parameter ports as well as the E2PROM interface are driven. The E2PROM interface acts as a serial two-wire interface with the following transmission streams:
ACK
ACK
1
0
1
0
A2
A1
A0
0
Byte Write Cycle
ACK
ACK
ACK
1
0
1
0
A2
A1
A0
0
1
0
1
0
A2
A1
A0
1
R/W
Byte Read Cycle
After the AS-Interface slave IC has sent the START condition, the device address is transmitted. This address would allow the selection of a maximum of 8 possible E2PROM ICs, is however fixed to 000 by the AS-Interface slave IC. Therefore in the application pins AO...A2 of the E2PROM are connected to Uss.
Rev. C, October 2000
R/W
ACK
SDA
S
Device-Address
R/W
Byte-Address
S
Device-Address
ACK
SDA
S
Device-Address
Byte-Address
Data
P
Data
P
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AS-Interface Slave IC AS2701A (ISA3+)
Write Cycle
After the device address, the write cycle R/W-Bit=0, necessary for the identification of the write cycle, is sent. The E2PROM acknowledges the correct receipt with the acknowledge bit ACK. Then the data byte which should be written into the E2PROM reacknowledges with an ACK signal of the E2PROM. The STOP condition ends the cycle.
Read Cycle
The read cycle is similar to the herein described write cycle. In this case the R/W-Bit = 1 which causes the E2PROM to place read data for the received Byte address on the bus after the acknowledge.
SDA
SCL
START Condition
STOP Condition
The START condition is recognized by the E2PROM when a H/L edge arises on the dataline SDA during the high phase of the clock. The STOP condition is present when a L/H edge arises on the dataline SDA during the high phase of the clock SCL. The timing of the E2PROM interface is derived from the AS-Interface quartz frequency of 5.333 MHz.
Rev. C, October 2000
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AS-Interface Slave IC AS2701A (ISA3+)
Functional, electrical and timing characteristics
All voltages are referenced to LTGN = 0V, timing is valid for a clock frequency of 5.333 MHz.
a) Absolute Maximum Ratings
Symbol VLTGP VLTGPOV Vin1 Parameter Positive Voltage Positive Impulse Voltage Voltage at D0... D3, P0... P3, DSTBn, PSTBn, CDC, UOUT, TEST Voltage at OSC1, OSC2, SDA, SCL, U5R Input Current on every Pin Non-Condensated Humidity Electrostatic Discharge Storing Temperature Soldering Temperature Power Dissipation Min - 0.3 VLTGN - 0.3 Max 40 50 VLTGP + 0.3 Unit V V V Note 1 2 Vin 40V
Vin2 Iin H ESD
VLTGN - 0.3 -25
7 25 1000 125 260 1
V mA V C C W 3 4 5 6
STG lead Ptot Notes: 1 A polarity protection diode is to be used externally 2 Impulse width: 50 s; repetition rate: 0.5 Hz 3 Defined in DIN 40040 cond. F 4 HBM; R = 1.5 k; C = 100pF 5 260 C for 10 s (reflow and wave soldering), 360 C for 3 s (manual soldering) 6 SOIC 20: Rthja = 64.5 K/W typ. -55
b) Recommended Operating Conditions
Symbol VLTGP1 VLTGP2 ILTG IOL IOL Parameter Positive Voltage Positive Voltage for Sensor Applications Operating Current @ VLTG = 30 V Max. Operating Current @ D0... D3, DSTBn Max. Output Current @ P0... P3, PSTBn Quartz Frequency Operating Temperature Min 26.9 17.5 max 33.1 33.1 6 10 6 Unit V V mA mA mA MHz C 4 Note 1 2 3
fC 5.333 -25 85 amb Notes: 1 DC Parameter; VLTGP1min = VUOUTmin + VDROPmax; VLTGPmax = VUOUTmax + VDROPmin 2 DC Parameter; VLTGP2min = VCOMOFFmax + VDROPmax 3 fC = 5.333 MHz, no load on UOUT and U5R, IC in idle mode 4" AS-Interface-Quartz"
Rev. C, October 2000
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AS-Interface Slave IC AS2701A (ISA3+)
c) Power Supply Pins LTGP and LTGN (LTGN = 0 V-reference)
The AS-Interface Slave IC's input at LTGP behaves as if a resistor RP and a (non-linear) parallel capacitor CP connect LTGP to LTGN. LTGP input impedance over frequency is as follows:
RP 10 kOhm 10 kOhm 10 kOhm 10 kOhm 10 kOhm 10 kOhm CP 35 pF 45 pF 48 pF 51 pF 54 pF 60 pF F 50 kHz 100 kHz 125 kHz 160 kHz 200 kHz 300 kHz
d) Data and Parameter Ports (D0...D3, DSTBn; P0...P3, PSTBn)
These pins are equipped with both an input and output channel as well as a current source based pull-up structure; the I/O-circuit at these pins and their DC-characteristics @ output channel 'Off' are described below. The AS-Interface slave system concept requires D0...D3 and DSTBn to be bidirectional pins and P0...P3 and PSTBn to be outputs. The input channel on pins P0...P3 and PSTBn is only implemented to simplify the AS-Interface Slave IC's device test, and is not intended to be used in AS-Interface Slave system applications.
U5R
11 A typ
0
D0..D3 DSTBn P0..P3 PSTBn
II[A]
-5
-10
-15
-20
LTGN
0
4
10
20
30
40
VI[V]
Rev. C, October 2000
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AS-Interface Slave IC AS2701A (ISA3+)
Symbol VIL VIH VHYST VOL11 VOL12 VOL2 IIL IIH CDL
Parameter Input Voltage " Low" Input Voltage " High" Input Hysteresis Output Voltage Output Voltage Output Voltage Input Current Input Current Loading Capacitance on DSTBn
min 0 3.5 0.25 0 0 0 -20 -10
max 1.5 VUOUT 0.5 1 1 0.4 -5 10 10
Unit V V V V V
Note
A A pF
1 IOL11 = 10mA D0... D3, DSTBn IOL12 = 6mA P0... P3, PSTBn IOL2 = 2mA VIL = 1V, Output " off" VU5R VIH 40V Output " off" 2
Notes: 1 Switching points approx. 2.5 V, i.e. 2.5 V VHYST 2 For larger capacitive loads an external Pull-Up-Resistor to UOUT must be used, so that the beginning of the DSTB = LOW impulse of VIH 3.5 V to DSTBn is reached in less than 35 s, otherwise a reset is the result.
Timing characteristics
Symbol t DSTBL t DSTBH t DATA t DSTB t DINon t DINoff t CYCLE t ALM1 t ALM2 Parameter DSTBn to D0... D3, Direction OUT, Output Data LOW DSTBn to D0... D3, Direction OUT, Output Data HIGH DSTBn to D0... D3, High Resistive DSTBn Pulse Width DSTBn to D0... D3, Direction IN, Valid Input Data DSTBn to D0... D3, End of Direction IN Next Cycle Extension DSTBn to D0... D3, High Resistive Extension DSTBn (No Reset) min max 1 1.5 6.2 6 6.5 12.5 150 44 35 7 6.8 7.7 t CYCLE Unit s s s s s s s s s 1 Note
Note 1: Data valid until DSTBn L/H-edge
Rev. C, October 2000
Page 8 of 16
AS-Interface Slave IC AS2701A (ISA3+)
tDINoff
D0..D3
tDINon tDSTBL
data in
HI-Z
Direction of Input
D0..D3
HI-Z
data out LOW
Direction of Output
data out HIGH
HI-Z
D0..D3
tDSTBH tDSTBL
D0..D3
data out
tDATA tDINon tDINoff tDSTBH
HI-Z
data in
HI-Z
Bidirectional
D0..D3
data out
HI-Z
data in
HI-Z
tDSTB
DSTBn
tCYCLE
DSTB (ext. LOW)
tALM2 tALM1 (tRESET1 )
Rev. C, October 2000
Page 9 of 16
AS-Interface Slave IC AS2701A (ISA3+)
e) Interface to the ext. E 2PROM (U5R, SCL, SDA) / functional, electrical and timing characteristics
Symbol VU5R CU5R IU5R VOL VOH VIL VIH tDATAinSU tDATAinHO tAA tDATAoutHO tSTARTSU tSTARTHO tSTOPSU tBUF tR tF tLOW tHIGH tSCL Parameter Output Voltage to E2PROM Load Capacity to U5R Output Current to U5R Output Voltage " Low" Output Voltage " High" Input Voltage " Low" (only SDA) Input Voltage " High" (only SDA) Set-up Time for Data Input Hold Time for Data Input Time from SCK Low to SDA Data Out and ACK Out Hold Time for Data Output Set-up Time for Start Condition Hold Time for Start Condition Set-up Time for Stop Condition Time which has to be Free for Bus: Before Next Transmission Rise Time Fall Time Impulse LOW Time Impuls HIGH Time Clock Frequency for E PROM
2
min 4.5 10
max 5.5 220 3
Unit V nF mA V V V V s s
Note IU5R 3 mA Ceramics capacitor
0 0.8 * VU5R -0.3 0.7 * VU5R 0.25 0
0.2 * VU5R VU5R 0.3 * VU5R VU5R + 0.3
IOL = 10 A -IOH = 10 A -IIL = 1.5... 0.2mA IIH = -1... 1 A
3.5 0.3 4.7 4 4.7 4.7 1000 300 4700 4000 100
s s s s s s ns ns ns ns kHz fc = 5.333 MHz
tF
tLOW
tHIGH
SCL
tSTARTSU tSTARTHO tR tDATAinHO tDATAinSU tSTOPSU tBUF
SDA in
tF tAA tDATAoutHO tR
SDA out
The U5R supply pin provides a typically 5V supply voltage to the external E2PROM, and has a biasing capability only for this purpose. Programming of the E2PROM is possible with the E2PROM soldered-in into the AS-Interface Slave unit's pc-board by accessing the SCL / SDA serial bus with an external programming hardware.
Rev. C, October 2000
Page 10 of 16
AS-Interface Slave IC AS2701A (ISA3+)
For successful programming the programmer hardware must have sink/source capability of at least 5 mA, and the AS-Interface Slave IC's supply voltage LTGP has to be in the range of 26.65 V ...33.35 V. The only E2PROM address locations which can be programmed through the AS-Interface Slave IC (hence over the AS-Interface Bus and by the AS-Interface Master), are locations 0 and 1, which both have been reserved for the AS-Interface Slave unit's address. The E2PROM has to be programmed in the following way:
E2PROM Address 0 1 2 3 D7 0 0 D6 D5 D4 D3 D2 D1 D0 Initialization Data 0 0 Custom Specific Data Custom Specific Data
0 0 0 0 ID Code ID Code
AS-Interface address AS-Interface address IO Configuration IO Configuration
Recommended E2PROM types:
Supplier Philips ST Catalyst Xicor Catalyst Xicor Type PCA8581P ST24C01 CAT24LC02(Z)IP X24LC02PI CAT24LC04(Z)IP X24(L)C04PI Organization 128 x 8 128 x 8 256 x 8 256 x 8 512 x 8 512 x 8
f) Sensor / actuator supply pin UOUT / Functional and electrical characteristics
Symbol VUOUT VUOUTp tUOUTP VDROP IUOUT CUOUT Parameter Output Voltage at UOUT Overswing of the Output Voltage Overswing Impulse Width Voltage Drop from LTGP to UOUT Output Current UOUT Load Capacity UOUT 5.5 0 10 min VLTGP - VDROP min max VLTGP - VDROPmin 1.5 2. 6.7 35 470 Unit V V ms V mA F 11.0 V < VUOUT < 27.6 V Note IUOUT = 35 mA CUOUT = 10 F: Switching 0-35 mA - 0
The interface is intended for the supply voltage to actuators, sensors as well as external circuits with a power supply of <35mA without overloading the AS-Interface line in the range of the signal frequency. The AS-Interface slave IC has an internal circuit protector which limits the current during the charging of the load capacitor and which effects a power down at thermal overload, e.g. at too high output currents. In the case of a current break down on the AS-Interface line of less than 1ms, the internally stored information is retained. The supply voltage of the IC during this time is extracted from the capacitor Pin UOUT which is disconnected from the AS-Interface line.
Rev. C, October 2000
Page 11 of 16
AS-Interface Slave IC AS2701A (ISA3+)
Reset Behaviour
The AS-Interface Slave IC can be in reset condition or reset by the following events: * at power-up of VLTGP: as long as VUOUT has not yet reached the treshold voltage 9 V VCOMOFF 11 V; * at power-down of VLTGP: as soon as U5R drops below the treshold voltage 3.5 V VPOR 4 V; * by a 'L' input level to DSTBn for more than 44 s; * resulting from a " Reset AS-Interface Slave" command by the AS-Interface Master over the AS-Interface BUS. The different levels of VCOMOFF and VPOR as per a) and b) and the fact that the U5R supply voltage results from a down-regulation of the VUOUT supply assure a desirable hysteresis in the order of several volts between the VUOUT power-on-reset and power-down-reset threshold. Whereas at power-up the AS-Interface Slave IC is released from reset by VUOUT reaching a level of between 9 V and 11 V, at power-down VUOUT has to come down to a level in the order of 5 V for U5R to drop into the reset-triggering window between 3.5 V and 4 V. Some different power-down events are illustrated below:
VLTGP 18 V 1
tLoff
VUOUT VCOMOFF 2
neither receive nor transmit
VUOUT VCOMOFF 3 VU5R VPOR
0V POR
(internal signal)
(no reset)
(reset)
Notes: as to (1): as to (2): as to (3):
No reset will be triggered, if VLTGP is lower than 18 V for less than 1 ms If VUOUT < VCOMOFF but still U5R > VPOR, communication over the Data Port is inhibited, but no reset triggered If U5R < VPOR (resulting from VUOUT << VCOMOFF), a reset is triggered. Reset is overcome as soon as VUOUT > VCOMOFF (implying U5R > VPOR)
In reset condition internal registers are cleared and data port D0...D3 is switched into highimpedant condition. After release from reset the AS-Interface Slave automatically performs a first read cycle to clear the E2PROM from any previously interrupted communication state and a second one to load the AS-Interface address, IO Configuration and ID Code into its internal registers.
Symbol t reset Parameter Reset Time after the Master Command " Reset AS-Interface Slave" or DSTBn = ext. L/H-Edge Reset Time after Power On Reset Time after Power On with great Load Capacity Voltage Breakdown Time Voltage for " Communication OFF" Voltage for Internal Reset min max 2 Unit ms Note
t reset2 t reset3 t Loff VCOMMoff VPOR
30 1000 1 11 4
ms ms ms V V
CUOUT = 470 F CUOUT > 10 F
9 3.5
Rev. C, October 2000
Page 12 of 16
AS-Interface Slave IC AS2701A (ISA3+)
Application Example 1:
Sensor/actuator circuit supplied by the AS-Interface Slave IC (UOUT) for supply current needs 35 mA.
1 A2 A1 TEST VSS A0 U5R
E2PROM
SDA SCL
C2
ASI-N
LTGN SDA SCL
C4
1 TEST D0 D1 D2 DSTBn U5R D3
ASI Line
V2
UOUT LTGP
ASI-Slave-IC
PSTBn OSC1 OSC2 CDC
V1
ASI-P
C1 C3 C5 G1
C1 = 22...470 nF / max. AS-Interface BUS DC voltage C2 = 10...220 nF / max VU5R = 5.5 V C3 = 10...470 F / max. (VUOUT + VUOUTp) = 29.1 V C4 = 22...100 nF / max. (VUOUT + VUOUTp + 1.4 V) = 30.5 V C5 = 10...100 nF (close to the IC) / max. (VUOUT + VUOUTp) = 29.1 V V1 = 1N4002 or equivalent V2 = TGL 41-39A or equivalent G1 = AS-Interface Crystal 5.333 MHz For V2 a limiter diode with a small capacitance value should be selected, to ensure that the AS-Interface Bus can be operated with the maximum number of Slave units connected. In a more general sense care should be taken that the pc board tracks and the external components between the AS-Interface Bus and LTGP / LTGN contribute to the AS-Interface Slave unit's input impedance inductively and highly resistively, rather than capacitively.
Rev. C, October 2000 Page 13 of 16
Customer Interface
P0
P1
P2
P3
AS-Interface Slave IC AS2701A (ISA3+)
Application Example 2:
Sensor / actuator circuit supplied from the AS-Interface Bus for supply current needs > 35 mA. It is recommended to protect the AS-Interface Bus by a fuse in this set-up, if there is a high risk of excessive current extraction due to component failure (e.g.: MC1747 or other components in the sensor / actuator circuitry).
ASI-P
2,2mH 2,2mH 100n 100n
4 5 7
U+ + U11 RF 10
ST24C01
8 VCC 4 5 7 10 100n 11 12 5 16 14 15 17 18 19 20 LTGN LTGP CDC DSTBn PSTBn OSC1 OSC2 P0 P1 P2 P3 SDA 9 8 7 6 C 13 4 3 2 1 A K E 3 6 1
8
ASI-N
100n100n
MC1747
VSS SDA MODE SCL E0
ASI-Slave-IC
2 E1 E2
SCL TEST U5R UOUT D0 D1 D2 D3
U1
130k 10 12k 100n 2,2mH 2,2mH 100n 130k
AS-Interface Quartz 5.333 MHz
AS2701A works fine with the following crystal types: Citizen CM 309 Philips SQ 4849 AS-Interface quartz crystals are available from: Endrich GmbH Contact: Axel Gensler Hauptstr. 56 D-72202 Nagold Tel.: +49-7452-6007-31 Fax: +49-7452-6007-70 Email: a.gensler@endrich.com Geyer electronic Contact: Jurgen Blank Camerloherstr. 71 D-80689 Munchen Tel.: +49-89-546868-13 Fax: +49-89-546868-90
Rev. C, October 2000
E PROM
2
Page 14 of 16
AS-Interface Slave IC AS2701A (ISA3+)
Kinseki Europe GmbH Contact: Dirk Holstein Schirmer Str. 76 D-40211 Dusseldorf Tel.: +49-211-36815-33 Fax: +49-211-36815-10 Email: dholstein@kinseki.de
Rutronik Elektronische Bauelemente GmbH Contact: Jurgen Tischhauser Industriestrae 2 D-75228 Ispringen / Pforzheim Tel.: +49-7231-801543 Fax: +49-7231-801633 Email: juergen_tischhauser@rutronik.com
Application Support
a) For general information and documentation on the AS-Interface concept you may contact one of the following AS-Interface Associations: AS-International Association Contact: Rolf Becker Zum Taubengarten 52 D-63571 Gelnhausen Tel.: +49-6051-473212 Fax: +49-6051-473282 Email: as-interface@t-online.de AS-Interface Switzerland Contact: Rainer Schnaidt Bittertenstrae 15 CH-4702 Oensingen Tel.: +41-62-388-2567 Fax: +41-62-388-2525 Email: rainer.schnaidt@fho.ch AS-Interface Italy Contact: Maurizio Ghizzoni Via G.B. Barinetti, 1 I-20145 Milano Tel.: +39-02-66761 Fax: +39-02-6676-3491 Email: maurizio.ghizzoni@siemens.it AS-Interface Great Britain Contact: Geoff Hodgkinson 1 West Street GB-PO 14 4DH Titchfield, Hampshire Tel.: +44-1329-511882 Fax: +44-1329-512063 Email: asi_uk@gghcomms.demon.co.uk AS-Interface France Contact: Gilles Mazet 5 rue Nadar F-92566 Rueil Malmaison cedex Tel.: +33-1-41-298294 Fax: +33-1-41-298482 Email: gilles_mazet@mail.schneider.fr AS-Interface The Nederlands Contact: Andre Braakman Boerhaavelaan 40 NL-2700 AD Zoetermeer Tel.: +31-79-353-1269 Fax: +31-79-353-1365 Email: ABA@FME.NL AS-Interface USA Contact: Michael Bryant 16101 N. 82nd Street, Suite 3B USA-85260 Scottsdale, Arizona Tel.: +1-480-368-9091 Fax: +1-480-483-7202 Email: mbryant@goodnet.com
Rev. C, October 2000
Page 15 of 16
AS-Interface Slave IC AS2701A (ISA3+)
AS-Interface Belgium Contact: Maurice de Smedt Avenue Paul Hymanslaan 47 B-1200 Bruxelles-Brussel Tel.: +32-2-771-3912 Fax: +32-2-771-1264 Email: m.desmedt@udias.be
AS-Interface Sweden Contact: Lars Mattsson Karl Nordstroms vag 31 SE-43253 Varberg Tel.: +46-3406-29270 Fax: +46-3406-77190 Email: lars-mattsson@marknadspartnermol.se
b) A demoboard, equipped with AS2701A and supporting discrete components, is available from: Bihl & Wiedemann GmbH Mr. Bihl Kafertaler Strae 164 D-68167 Mannheim Tel.: +49-621-339-2723 Fax: +49-621-339-2239 Leuze electronic GmbH Mr. Keller In der Braike 1 D-73277 Owen/Teck Tel.: +49-7021-573-248 Fax: +49-8021-573-200
c) Technical hotline assistance is provided by: Bihl & Wiedemann GmbH (see above)
Bibliography
ASI: The Actuator-Sensor-Interface for Automation Edts.: Werner Kriesel, Otto W. Madelung Carl Hanser Verlag, Munich and Vienna, 1995 ISBN: 3-446-18265-9
Ordering Information
AS2701A AS2701AT Package: SOIC 20 Package: SOIC 20 Delivery: Tubes Delivery: Tape & Reel
Copyright (c) 2000, Austria Mikro Systeme International AG, Schlo Premstatten, 8141 Unterpremstatten, Austria. Telefon +43-(0)3136-500-0, Telefax +43-(0)3136-52501, E-Mail info@amsint.com All rights reserved. No part of this publication may be reproduced, stored in a retrieval system, or transmitted, in any form or by any means, without the prior permission in writing by the copyright holder. To the best of its knowledge, Austria Mikro Systeme International asserts that the information contained in this publication is accurate and correct.
Rev. C, October 2000
Page 16 of 16

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